SAE J 1752/3:2017-09-22

This measurement procedure defines a method for measuring the electromagnetic radiation from an integrated circuit (IC). The IC being evaluated is mounted on an IC test printed circuit board (PCB) that is clamped to a mating port (referred to as a wall port) cut in the top or bottom of a TEM or wideband TEM (GTEM) cell. The test board is not in the cell as in the conventional usage but becomes a part of the cell wall. This method is applicable to any TEM or GTEM cell modified to incorporate the wall port; however, the measured RF voltage is affected by the septum to test board (wall) spacing. This procedure was developed using a 1 GHz TEM cell with a septum to wall spacing of 45 mm and a GTEM cell with average septum to wall spacing of 45 mm over the port area. Other cells may not produce identical spectral output but may be used for comparative measurements, subject to their frequency and sensitivity limitations. A conversion factor may allow comparisons between data measured on TEM or GTEM cells with different septum to wall spacing. The IC test board controls the geometry and orientation of the operating IC relative to the cell and eliminates any connecting leads within the cell (these are on the backside of the board, which is outside the cell). For the TEM cell, one of the 50 O ports is terminated with a 50 O load. The other 50 O port for a TEM cell, or the single 50 O port for a GTEM cell, is connected to the input of a spectrum analyzer or receiver that measures the RF emissions emanating from the IC and coupled onto the septum of the TEM cell.

Author	SAE
Editor	SAE
Document type	Standard
Format	File
ICS	33.100.10 : Emission 43.040.10 : Electrical and electronic equipment
Number of pages	16
Replace	SAE J 1752/3:2011-06-17
Replaced by	SAE J 1752/3:2011-06-17
Year	2017
Document history	SAE J 1752/3:2011-06-17
Country	USA
Keyword	SAE 17523;SAE J1752/3;SAE J1752/3;SAE J 1752/3