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EIA JESD 82-24:2007
Definition of the SSTUB32865 for DDR2 RDIMM Applications 28-bit 1:2 Registered Buffer with ParityMore info
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32865 registered buffer with parity for 2 rank by 4 or similar high-density DDR2 RDIMM applications. The SSTUB32865 is identical in functionality to the SSTU32865 but specifies tighter timing characteristics and a higher application frequency of up to 410MHz.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 35.220.99 : Other data storage devices |
| Number of pages | 30 |
| Year | 2007 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 82;EIA 82;EIA 82.24;82;EIA JESD82-24 |