Cart 0 Product Products (empty)
No products
To be determined Shipping
$0.00 Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart. There is 1 item in your cart.
Total products
Total shipping To be determined
Total
New Sale! 
View larger
View larger More info
This document specifies the definition and construction of a two-resistor compact thermal model (CTM) from the JEDEC junction-to-case and junction-to-board thermal metrics. The guidance provided in this document only applies to thermal metrics defined in JEDEC standards JESD51-8 and JESD51-12. The scope of this document is limited to single-die packages that can be effectively represented by a single junction temperature.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.040.01 : Resistors in general |
| Number of pages | 22 |
| Year | 2008 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 15;EIA 15;EIA 15.3;15;EIA JESD15-3 |