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This standard defines DC interface parameters and test conditions for a family of non-terminated CMOS digital circuits intended for use over a wide power supply voltage range. The standard bridges a number of existing JEDEC standards in the JESD8-x family to facilitate applications that operate over an ultra-wide power supply voltage range in order to achieve lower power dissipation or higher performance.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.200 : Integrated circuits. Microelectronics |
| Number of pages | 10 |
| Year | 2009 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 8;EIA 8;EIA 8.23;8;EIA JESD8-23 |